Материал: 271024

PROGRAMMING TIME of AROUND 6 sec. (PRESTO II ALGORITHM)

DESCRIPTION

The M27C1024 is a 1 Megabit UV erasable and electrically programmable read only memory (EPROM). It is organized as 65,536 words by 16 bits.

The 40 pin Ceramic Frit Seal Window package has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.

For application where the content is programmed only one time and erasure is not required, the M27C1024 is offered in a Plastic Leaded Chip Carrier package.

Table 1. Signal Names

TSOP40 (N) 10 x 14mm

Figure 1. Logic Diagram

P M27C1024

E

G

VSS

AI00702B

M27C1024

Figure 2A. DIP Pin Connections

Warning: NC = Not Connected.

Figure 2C. TSOP Pin Connections

Warning: NC = Not Connected.

Figure 2B. LCC Pin Connections

Warning: NC = Not Connected.

DEVICE OPERATION

The modes of operations of the M27C1024 are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for Vpp and 12V on A9 for Electronic Signature.

Read Mode

The M27C1024 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time

(tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tOE

from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.

Standby Mode

The M27C1024 has a standby mode which reduces the active current from 35mA to 100μA.

The M27C1024 is placed in the standby mode by applying a TTL high signal to the E input. When in the standbymode, the outputs are in a high impedance state, independent of the G input.

Two Line Output Control

Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows:

a.the lowest possible memory power dissipation,

b.complete assurance that output bus contention will not occur.

For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.

M27C1024

AC MEASUREMENT CONDITIONS

Note that Output Hi-Z is defined as the point where data is no longer driven.

Figure 3. AC Testing Input Output Waveforms

2.4V

2.0V

0.8V

0.4V

AI00826

Figure 4. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE

UNDER OUT TEST

CL = 100pF

CL includes JIG capacitance

AI00828